HOME
SITE MAP
CONTACT
KOREAN
■ Introduction
A suite of MyCAD
MyCAD design flow
Major customer
■ Link
MyCAD (KOR)
MyCAD (EN)
SchEd_Analog : Schematic/Symbol Editor Logic2SPICE : SPICE Netlist Extractor Analog : Analog Library MySPICE : Analog Circuit Simulator MyGPP : Graphical Post Processor
SchEd_Logic : Schematic/Symbol Editor MySim : Logic Simulator, Wave displayer Logic2EDIF : EDIF Translator Xilinx, Altera, SCMOS, Library
MyVHDL : VHDL Modeling and Analysis, Compiler & Simulator Waveform Editor : Automatic Test-bench Generator
FPGA and ASIC prototype systems
303 Jangwon Blog., 139-1 Garak-ro, Songpa-gu, Seoul, 138-850, Korea TEL : +82-2-3432-1210 FAX : +82-2-3432-8855 Copyright(C) Seloco, Inc. All rights reserved.
